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authorVarun Sethi <Varun.Sethi@freescale.com>2013-07-15 08:50:56 +0400
committerJoerg Roedel <joro@8bytes.org>2013-08-14 13:38:34 +0400
commit7cabf491eb6d52ea7f166b287702890cae0c803d (patch)
tree30842eae9e0e2f77e02ba0ead4d2c705e081cd4a /include/linux/iommu.h
parentbb9175051aedb33dcf44741c6f145107ab132a87 (diff)
downloadlinux-7cabf491eb6d52ea7f166b287702890cae0c803d.tar.xz
iommu/fsl: Add additional iommu attributes required by the PAMU driver.
Added the following domain attributes for the FSL PAMU driver: 1. Added new iommu stash attribute, which allows setting of the LIODN specific stash id parameter through IOMMU API. 2. Added an attribute for enabling/disabling DMA to a particular memory window. 3. Added domain attribute to check for PAMUV1 specific constraints. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'include/linux/iommu.h')
-rw-r--r--include/linux/iommu.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 3aeb7305e2f5..7ea319e95b47 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -58,10 +58,26 @@ struct iommu_domain {
#define IOMMU_CAP_CACHE_COHERENCY 0x1
#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
+/*
+ * Following constraints are specifc to FSL_PAMUV1:
+ * -aperture must be power of 2, and naturally aligned
+ * -number of windows must be power of 2, and address space size
+ * of each window is determined by aperture size / # of windows
+ * -the actual size of the mapped region of a window must be power
+ * of 2 starting with 4KB and physical address must be naturally
+ * aligned.
+ * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
+ * The caller can invoke iommu_domain_get_attr to check if the underlying
+ * iommu implementation supports these constraints.
+ */
+
enum iommu_attr {
DOMAIN_ATTR_GEOMETRY,
DOMAIN_ATTR_PAGING,
DOMAIN_ATTR_WINDOWS,
+ DOMAIN_ATTR_FSL_PAMU_STASH,
+ DOMAIN_ATTR_FSL_PAMU_ENABLE,
+ DOMAIN_ATTR_FSL_PAMUV1,
DOMAIN_ATTR_MAX,
};