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| author | Lu Baolu <baolu.lu@linux.intel.com> | 2020-01-02 03:18:18 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-01-07 16:05:58 +0300 |
| commit | 33cd6e642d6a76c1d338ce25cba5fd79a5029011 (patch) | |
| tree | 89ae6c4a6b8c97a1d3e6a83882d4cb04cf992804 /include/linux/intel-iommu.h | |
| parent | ddf09b6d43ece8e4d5591e4957e89c4fe7714792 (diff) | |
| download | linux-33cd6e642d6a76c1d338ce25cba5fd79a5029011.tar.xz | |
iommu/vt-d: Flush PASID-based iotlb for iova over first level
When software has changed first-level tables, it should invalidate
the affected IOTLB and the paging-structure-caches using the PASID-
based-IOTLB Invalidate Descriptor defined in spec 6.5.2.4.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux/intel-iommu.h')
| -rw-r--r-- | include/linux/intel-iommu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 454c69712131..3a4708a8a414 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -650,6 +650,8 @@ extern void qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr, unsigned int size_order, u64 type); extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid, u16 qdep, u64 addr, unsigned mask); +void qi_flush_piotlb(struct intel_iommu *iommu, u16 did, u32 pasid, u64 addr, + unsigned long npages, bool ih); extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); extern int dmar_ir_support(void); |