diff options
| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2016-09-20 15:15:21 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-09-23 15:49:50 +0300 |
| commit | 79b804cb6af4f128b2c53f0887c02537a7eb5824 (patch) | |
| tree | 7eac13032ae91d1d9d24d264fde22a654c744a57 /include/linux/gpio | |
| parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
| download | linux-79b804cb6af4f128b2c53f0887c02537a7eb5824.tar.xz | |
gpiolib: Make it possible to exclude GPIOs from IRQ domain
When using GPIO irqchip helpers to setup irqchip for a gpiolib based
driver, it is not possible to select which GPIOs to add to the IRQ domain.
Instead it just adds all GPIOs which is not always desired. For example
there might be GPIOs that for some reason cannot generated normal
interrupts at all.
To support this we add a flag irq_need_valid_mask to struct gpio_chip. When
this flag is set the core allocates irq_valid_mask that holds one bit for
each GPIO the chip has. By default all bits are set but drivers can
manipulate this using set_bit() and clear_bit() accordingly.
Then when gpiochip_irqchip_add() is called, this mask is checked and all
GPIOs with bit is set are added to the IRQ domain created for the GPIO
chip.
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio')
| -rw-r--r-- | include/linux/gpio/driver.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 50882e09289b..420b837f2aa7 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -112,6 +112,10 @@ enum single_ended_mode { * initialization, provided by GPIO driver * @irq_parent: GPIO IRQ chip parent/bank linux irq number, * provided by GPIO driver + * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all + * bits set to one + * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to + * be included in IRQ domain of the chip * @lock_key: per GPIO IRQ chip lockdep class * * A gpio_chip can help platforms abstract various sources of GPIOs so @@ -190,6 +194,8 @@ struct gpio_chip { irq_flow_handler_t irq_handler; unsigned int irq_default_type; int irq_parent; + bool irq_need_valid_mask; + unsigned long *irq_valid_mask; struct lock_class_key *lock_key; #endif |