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| author | Linus Walleij <linus.walleij@linaro.org> | 2012-11-20 15:40:15 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-21 11:55:03 +0400 |
| commit | 3f0f8670608766ef26a178d4e80cad3ce030fecc (patch) | |
| tree | d2f192a4a454bd677983c7eb0b88a0016f128bf6 /include/linux/gpio.h | |
| parent | 5212d096cbed2eae1e442b3f8bf448e6a577af6f (diff) | |
| download | linux-3f0f8670608766ef26a178d4e80cad3ce030fecc.tar.xz | |
gpiolib: let gpiochip_add_pin_range() specify offset
Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76
it is not always enough to specify all the pins of a gpio_chip
from offset zero to be added to a pin map range, since the
mapping from GPIO to pin controller may not be linear at all,
but need to be broken into a few consecutive sub-ranges or
1-pin entries for complicated cases. The ranges may also be
sparse.
This alters the signature of the function to accept offsets
into both the GPIO-chip local pinspace and the pin controller
local pinspace.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio.h')
| -rw-r--r-- | include/linux/gpio.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 7ba2762abbc9..99861c65dd8b 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -233,7 +233,8 @@ static inline int irq_to_gpio(unsigned irq) static inline int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, - unsigned int pin_base, unsigned int npins) + unsigned int offset, unsigned int pin_base, + unsigned int npins) { WARN_ON(1); return -EINVAL; |