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| author | Viresh KUMAR <viresh.kumar@st.com> | 2011-03-04 13:12:51 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2011-03-06 22:42:28 +0300 |
| commit | ee66509d7f354eecb45ac99f21ea6aa8650dea7e (patch) | |
| tree | 206438e7c0ef9a7f0633fe44d6f306fdbf4b0b4e /include/linux/dw_dmac.h | |
| parent | 59c22fc11d12b69da36c6585a38229863ba0bb16 (diff) | |
| download | linux-ee66509d7f354eecb45ac99f21ea6aa8650dea7e.tar.xz | |
dw_dmac: Allow src/dst msize & flow controller to be configured at runtime
Msize or Burst Size is peripheral dependent in case of prep_slave_sg and
cyclic_prep transfers, and in case of memcpy transfers it is platform dependent.
So msize configuration must come from platform data.
Also some peripherals (ex: JPEG), need to be flow controller for dma transfers,
so this information in case of slave_sg & cyclic_prep transfers must come from
platform data.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/linux/dw_dmac.h')
| -rw-r--r-- | include/linux/dw_dmac.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index 3ba2f066ff46..6998d9376ef9 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h @@ -42,6 +42,30 @@ enum dw_dma_slave_width { DW_DMA_SLAVE_WIDTH_32BIT, }; +/* bursts size */ +enum dw_dma_msize { + DW_DMA_MSIZE_1, + DW_DMA_MSIZE_4, + DW_DMA_MSIZE_8, + DW_DMA_MSIZE_16, + DW_DMA_MSIZE_32, + DW_DMA_MSIZE_64, + DW_DMA_MSIZE_128, + DW_DMA_MSIZE_256, +}; + +/* flow controller */ +enum dw_dma_fc { + DW_DMA_FC_D_M2M, + DW_DMA_FC_D_M2P, + DW_DMA_FC_D_P2M, + DW_DMA_FC_D_P2P, + DW_DMA_FC_P_P2M, + DW_DMA_FC_SP_P2P, + DW_DMA_FC_P_M2P, + DW_DMA_FC_DP_P2P, +}; + /** * struct dw_dma_slave - Controller-specific information about a slave * @@ -55,6 +79,9 @@ enum dw_dma_slave_width { * @cfg_lo: Platform-specific initializer for the CFG_LO register * @src_master: src master for transfers on allocated channel. * @dst_master: dest master for transfers on allocated channel. + * @src_msize: src burst size. + * @dst_msize: dest burst size. + * @fc: flow controller for DMA transfer */ struct dw_dma_slave { struct device *dma_dev; @@ -65,6 +92,9 @@ struct dw_dma_slave { u32 cfg_lo; u8 src_master; u8 dst_master; + u8 src_msize; + u8 dst_msize; + u8 fc; }; /* Platform-configurable bits in CFG_HI */ |