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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2012-09-21 16:05:47 +0400 |
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committer | Vinod Koul <vinod.koul@linux.intel.com> | 2012-09-27 14:05:23 +0400 |
commit | 4a63a8b3e8d2e4f56174deb728085010aa3ac2a1 (patch) | |
tree | 0c6d4fb4cd88f9c7fff748909e5956ea55793ef0 /include/linux/dw_dmac.h | |
parent | 482c67ea7bab80b956185a3e7553151820bc5876 (diff) | |
download | linux-4a63a8b3e8d2e4f56174deb728085010aa3ac2a1.tar.xz |
dw_dmac: autoconfigure block_size or use platform data
The maximum block size is a configurable parameter for the chip. So, driver
will try to get it from the encoded component parameters. Otherwise it will
come from the platform data.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'include/linux/dw_dmac.h')
-rw-r--r-- | include/linux/dw_dmac.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index 2412e02d7c0f..3315ef9c785b 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h @@ -19,6 +19,7 @@ * @nr_channels: Number of channels supported by hardware (max 8) * @is_private: The device channels should be marked as private and not for * by the general purpose DMA channel allocator. + * @block_size: Maximum block size supported by the controller */ struct dw_dma_platform_data { unsigned int nr_channels; @@ -29,6 +30,7 @@ struct dw_dma_platform_data { #define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */ #define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */ unsigned char chan_priority; + unsigned short block_size; }; /* bursts size */ |