diff options
| author | David Lechner <david@lechnology.com> | 2018-05-25 21:11:47 +0300 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2018-05-30 22:48:35 +0300 |
| commit | 76c9dd9dbd6459f1faf2b10351eb3d3f90255fa1 (patch) | |
| tree | 48053e2359e7fe36ef488bdbf01a3429ba104964 /include/linux/clk | |
| parent | 9c39fc1fe87a5f60f0103afbbcf0d8eaedc28ab7 (diff) | |
| download | linux-76c9dd9dbd6459f1faf2b10351eb3d3f90255fa1.tar.xz | |
clk: davinci: pll: allow dev == NULL
This modifies the TI Davinci PLL clock driver to allow for the case
when dev == NULL. On some (most) SoCs that use this driver, the PLL
clock needs to be registered during early boot because it is used
for clocksource/clkevent and there will be no platform device available.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180525181150.17873-7-david@lechnology.com
Diffstat (limited to 'include/linux/clk')
| -rw-r--r-- | include/linux/clk/davinci.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h new file mode 100644 index 000000000000..ebdd9df1c0ef --- /dev/null +++ b/include/linux/clk/davinci.h @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Clock drivers for TI DaVinci PLL and PSC controllers + * + * Copyright (C) 2018 David Lechner <david@lechnology.com> + */ + +#ifndef __LINUX_CLK_DAVINCI_PLL_H___ +#define __LINUX_CLK_DAVINCI_PLL_H___ + +#include <linux/device.h> +#include <linux/regmap.h> + +/* function for registering clocks in early boot */ + +int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int dm644x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); +int dm646x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); + +#endif /* __LINUX_CLK_DAVINCI_PLL_H___ */ |