diff options
| author | Joseph Lo <josephl@nvidia.com> | 2019-05-29 11:21:34 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-05-12 23:48:41 +0300 |
| commit | a3cba697a2a09e6769996d5265991a3228004d92 (patch) | |
| tree | 44529c3daedf7f001d4f17acd0db5c4d647facad /include/linux/clk | |
| parent | cd4d6f357545bc03112265b19e5ed50592812986 (diff) | |
| download | linux-a3cba697a2a09e6769996d5265991a3228004d92.tar.xz | |
clk: tegra: Export functions for EMC clock scaling
Export functions to allow accessing the CAR register required by EMC
clock scaling. These functions will be used to access the CAR register
as part of the scaling sequence.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/linux/clk')
| -rw-r--r-- | include/linux/clk/tegra.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index 2b1b35240074..5b0bdb413460 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -131,6 +131,9 @@ extern void tegra210_set_sata_pll_seq_sw(bool state); extern void tegra210_put_utmipll_in_iddq(void); extern void tegra210_put_utmipll_out_iddq(void); extern int tegra210_clk_handle_mbist_war(unsigned int id); +extern void tegra210_clk_emc_dll_enable(bool flag); +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); struct clk; |