summaryrefslogtreecommitdiff
path: root/include/dt-bindings
diff options
context:
space:
mode:
authorChanwoo Choi <cw00.choi@samsung.com>2015-01-15 04:50:52 +0300
committerSylwester Nawrocki <s.nawrocki@samsung.com>2015-01-28 17:51:17 +0300
commite64fb42da4c6c713cfc7cad607e97e0773fa41ff (patch)
tree290f1207fd8549047ebea3ff56393f704c6a964b /include/dt-bindings
parent01e5200d169a442651f823e4941ca61d78ec2b8d (diff)
downloadlinux-e64fb42da4c6c713cfc7cad607e97e0773fa41ff.tar.xz
clk: samsung: exynos4: Add divider clock id for memory bus frequency
This patch adds the divider clock id for Exynos4 memory bus frequency. The clock id is used for DVFS (Dynamic Voltage/Frequency Scaling) feature of the exynos memory bus. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/exynos4.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index 34fe28c622d0..c4b1676ea674 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -262,8 +262,13 @@
#define CLK_DIV_MCUISP1 453 /* Exynos4x12 only */
#define CLK_DIV_ACLK200 454 /* Exynos4x12 only */
#define CLK_DIV_ACLK400_MCUISP 455 /* Exynos4x12 only */
+#define CLK_DIV_ACP 456
+#define CLK_DIV_DMC 457
+#define CLK_DIV_C2C 458 /* Exynos4x12 only */
+#define CLK_DIV_GDL 459
+#define CLK_DIV_GDR 460
/* must be greater than maximal clock id */
-#define CLK_NR_CLKS 456
+#define CLK_NR_CLKS 461
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_4_H */