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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-07-12 00:51:58 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-07-15 07:20:39 +0300 |
| commit | 4b9b7b3a2c91e1ebf8be9c7efd4839b91d66e87e (patch) | |
| tree | bf9472a2ceab27ae04308e0008bf5bc8391ed9ac /include/dt-bindings | |
| parent | 8fd763c75c3ab8e72e5d7f0d4c53531e6ff76197 (diff) | |
| download | linux-4b9b7b3a2c91e1ebf8be9c7efd4839b91d66e87e.tar.xz | |
ARM: dts: r8a7792: add PLL1 divided by 2 clock
Despite the fact that QSPI clock has PLL1/VCOx1/4 clock as a parent, the
latter hasn't been added to the R8A7792 device tree. This patch corrects
that oversight.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'include/dt-bindings')
0 files changed, 0 insertions, 0 deletions