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authorOlof Johansson <olof@lixom.net>2016-07-07 08:22:19 +0300
committerOlof Johansson <olof@lixom.net>2016-07-07 08:22:19 +0300
commita7f856d6ad3feeedfb560325dab67c8e253ea7a1 (patch)
treeb75603f3d0170a21e63371c64e90a6cbd9922a73 /include/dt-bindings
parent5fd70b1b17d47519b908ae6a4960dfdcf0a069ca (diff)
parent241eff3c198492b2d63e75723b774f2836fee8a3 (diff)
downloadlinux-a7f856d6ad3feeedfb560325dab67c8e253ea7a1.tar.xz
Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Audio support and spi-flash on rk3288-veyron Chromedevices as well as i2s and ethernet support on rk3228/rk3229 devices and a dts file for the rk3229 eval board. * tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add support rk3229 evb board ARM: dts: rockchip: add GMAC nodes for RK322x SoCs ARM: dts: rockchip: add i2s nodes for RK322x SoCs ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi clk: rockchip: add clock-ids for rk3228 MAC clocks clk: rockchip: add clock-ids for rk3228 audio clocks ARM: dts: rockchip: rename i2s model for Veyron devices ARM: dts: rockchip: move rk3288 io-domain nodes to the grf ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards ARM: dts: rockchip: add SPI flash node for rk3288-veyron Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/rk3228-cru.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 5d43ed9b05ad..b27e2b1a65e3 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -52,6 +52,15 @@
#define SCLK_EMMC_SAMPLE 121
#define SCLK_VOP 122
#define SCLK_HDMI_HDCP 123
+#define SCLK_MAC_SRC 124
+#define SCLK_MAC_EXTCLK 125
+#define SCLK_MAC 126
+#define SCLK_MAC_REFOUT 127
+#define SCLK_MAC_REF 128
+#define SCLK_MAC_RX 129
+#define SCLK_MAC_TX 130
+#define SCLK_MAC_PHY 131
+#define SCLK_MAC_OUT 132
/* dclk gates */
#define DCLK_VOP 190
@@ -61,6 +70,7 @@
#define ACLK_DMAC 194
#define ACLK_PERI 210
#define ACLK_VOP 211
+#define ACLK_GMAC 212
/* pclk gates */
#define PCLK_GPIO0 320
@@ -82,8 +92,13 @@
#define PCLK_PERI 363
#define PCLK_HDMI_CTRL 364
#define PCLK_HDMI_PHY 365
+#define PCLK_GMAC 367
/* hclk gates */
+#define HCLK_I2S0_8CH 442
+#define HCLK_I2S1_8CH 443
+#define HCLK_I2S2_2CH 444
+#define HCLK_SPDIF_8CH 445
#define HCLK_VOP 452
#define HCLK_NANDC 453
#define HCLK_SDMMC 456