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| author | Stephen Boyd <sboyd@kernel.org> | 2024-05-07 02:51:34 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-05-07 02:51:34 +0300 |
| commit | 2f8acf7837911e3470e506a63c8e7935b8df7e4e (patch) | |
| tree | e4422b8d1f9fc8354c561bb94274b10a18ed8138 /include/dt-bindings/reset | |
| parent | 4cece764965020c22cff7665b18a012006359095 (diff) | |
| parent | f513991b69885025995dcb4ca75d2ee7261e1273 (diff) | |
| download | linux-2f8acf7837911e3470e506a63c8e7935b8df7e4e.tar.xz | |
Merge tag 'v6.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull some small Rockchip clk driver updates from Heiko Stuebner:
- A new PLL rate and missing mux on rk3568
- A missing reset line on rk3588
- Removal of an unused field in struct rockchip_mmc_clock
* tag 'v6.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3568: Add PLL rate for 724 MHz
clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
clk: rockchip: rk3588: Add reset line for HDMI Receiver
clk: rockchip: rk3568: Add missing USB480M_PHY mux
dt-bindings: reset: Define reset id used for HDMI Receiver
dt-bindings: clock: rockchip: add USB480M_PHY mux
Diffstat (limited to 'include/dt-bindings/reset')
| -rw-r--r-- | include/dt-bindings/reset/rockchip,rk3588-cru.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/rockchip,rk3588-cru.h b/include/dt-bindings/reset/rockchip,rk3588-cru.h index d4264db2a07f..e2fe4bd5f7f0 100644 --- a/include/dt-bindings/reset/rockchip,rk3588-cru.h +++ b/include/dt-bindings/reset/rockchip,rk3588-cru.h @@ -751,4 +751,6 @@ #define SRST_P_TRNG_CHK 658 #define SRST_TRNG_S 659 +#define SRST_A_HDMIRX_BIU 660 + #endif |