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| author | Leonard Crestez <leonard.crestez@nxp.com> | 2020-04-28 20:03:02 +0300 |
|---|---|---|
| committer | Georgi Djakov <georgi.djakov@linaro.org> | 2020-04-28 20:03:02 +0300 |
| commit | 2c1966af073c3469e886e8f4c4c83403fe2ac857 (patch) | |
| tree | c46a95f7cfdd7335859802cc5126fdba3be0cf7d /include/dt-bindings/interconnect | |
| parent | f0d8048525d7d8618a79550cd70de9ce0a6a496f (diff) | |
| download | linux-2c1966af073c3469e886e8f4c4c83403fe2ac857.tar.xz | |
interconnect: imx: Add platform driver for imx8mm
Add a platform driver for the i.MX8MM SoC describing bus topology.
Bandwidth adjustments is currently only supported on the DDRC and main
NOC. Scaling for the vpu/gpu/display NICs could be added in the future.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lore.kernel.org/r/b14eef179dbd837a486619724b8033490f49db72.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Diffstat (limited to 'include/dt-bindings/interconnect')
| -rw-r--r-- | include/dt-bindings/interconnect/imx8mm.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/include/dt-bindings/interconnect/imx8mm.h b/include/dt-bindings/interconnect/imx8mm.h new file mode 100644 index 000000000000..8f10bb06cb59 --- /dev/null +++ b/include/dt-bindings/interconnect/imx8mm.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019, BayLibre + * Copyright (c) 2019-2020, NXP + * Author: Alexandre Bailon <abailon@baylibre.com> + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H +#define __DT_BINDINGS_INTERCONNECT_IMX8MM_H + +#define IMX8MM_ICN_NOC 1 +#define IMX8MM_ICS_DRAM 2 +#define IMX8MM_ICS_OCRAM 3 +#define IMX8MM_ICM_A53 4 + +#define IMX8MM_ICM_VPU_H1 5 +#define IMX8MM_ICM_VPU_G1 6 +#define IMX8MM_ICM_VPU_G2 7 +#define IMX8MM_ICN_VIDEO 8 + +#define IMX8MM_ICM_GPU2D 9 +#define IMX8MM_ICM_GPU3D 10 +#define IMX8MM_ICN_GPU 11 + +#define IMX8MM_ICM_CSI 12 +#define IMX8MM_ICM_LCDIF 13 +#define IMX8MM_ICN_MIPI 14 + +#define IMX8MM_ICM_USB1 15 +#define IMX8MM_ICM_USB2 16 +#define IMX8MM_ICM_PCIE 17 +#define IMX8MM_ICN_HSIO 18 + +#define IMX8MM_ICM_SDMA2 19 +#define IMX8MM_ICM_SDMA3 20 +#define IMX8MM_ICN_AUDIO 21 + +#define IMX8MM_ICN_ENET 22 +#define IMX8MM_ICM_ENET 23 + +#define IMX8MM_ICN_MAIN 24 +#define IMX8MM_ICM_NAND 25 +#define IMX8MM_ICM_SDMA1 26 +#define IMX8MM_ICM_USDHC1 27 +#define IMX8MM_ICM_USDHC2 28 +#define IMX8MM_ICM_USDHC3 29 + +#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */ |