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authorChris Zankel <czankel@tensilica.com>2005-06-24 09:01:26 +0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 11:05:22 +0400
commit9a8fd5589902153a134111ed7a40f9cca1f83254 (patch)
tree6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6 /include/asm-xtensa/ide.h
parent3f65ce4d141e435e54c20ed2379d983d362a2cb5 (diff)
downloadlinux-9a8fd5589902153a134111ed7a40f9cca1f83254.tar.xz
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/ide.h')
-rw-r--r--include/asm-xtensa/ide.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/asm-xtensa/ide.h b/include/asm-xtensa/ide.h
new file mode 100644
index 000000000000..b523cd4a486e
--- /dev/null
+++ b/include/asm-xtensa/ide.h
@@ -0,0 +1,36 @@
+/*
+ * include/asm-xtensa/ide.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1996 Linus Torvalds & authors
+ * Copyright (C) 2001 - 2005 Tensilica Inc.
+ */
+
+#ifndef _XTENSA_IDE_H
+#define _XTENSA_IDE_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+
+#ifndef MAX_HWIFS
+# define MAX_HWIFS 1
+#endif
+
+static __inline__ int ide_default_irq(unsigned long base)
+{
+ /* Unsupported! */
+ return 0;
+}
+
+static __inline__ unsigned long ide_default_io_base(int index)
+{
+ /* Unsupported! */
+ return 0;
+}
+
+#endif /* __KERNEL__ */
+#endif /* _XTENSA_IDE_H */