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authorThomas Gleixner <tglx@linutronix.de>2007-10-16 01:28:20 +0400
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-17 22:17:15 +0400
commit9bfa23df5632775bcb70b87975743046a71f7a3b (patch)
tree13f44b8d9892aedaf92e1a1ab2358944090b4024 /include/asm-x86/cache.h
parentb2bba72c10cdd907f73c57c8bdeb3354f8c233c6 (diff)
downloadlinux-9bfa23df5632775bcb70b87975743046a71f7a3b.tar.xz
x86: unify include/asm/cache_32/64.h
Same file, except for whitespace, comment formatting and the extra defines in _64, which are conditional on VSMP anyway. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/cache.h')
-rw-r--r--include/asm-x86/cache.h23
1 files changed, 19 insertions, 4 deletions
diff --git a/include/asm-x86/cache.h b/include/asm-x86/cache.h
index c36d190ac9d8..1e0bac86f38f 100644
--- a/include/asm-x86/cache.h
+++ b/include/asm-x86/cache.h
@@ -1,5 +1,20 @@
-#ifdef CONFIG_X86_32
-# include "cache_32.h"
-#else
-# include "cache_64.h"
+#ifndef _ARCH_X86_CACHE_H
+#define _ARCH_X86_CACHE_H
+
+/* L1 cache line size */
+#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
+#ifdef CONFIG_X86_VSMP
+/* vSMP Internode cacheline shift */
+#define INTERNODE_CACHE_SHIFT (12)
+#ifdef CONFIG_SMP
+#define __cacheline_aligned_in_smp \
+ __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \
+ __attribute__((__section__(".data.page_aligned")))
+#endif
+#endif
+
#endif