diff options
| author | Adrian Bunk <bunk@kernel.org> | 2008-07-24 08:28:50 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 21:47:24 +0400 |
| commit | f606ddf42fd4edc558eeb48bfee66d2c591571d2 (patch) | |
| tree | 193f00db121201255b2629fce43b99a53c4ec735 /include/asm-v850/v850e_cache.h | |
| parent | 99764fa4ceeecba8b9e0a8a5565b418a2e94f83b (diff) | |
| download | linux-f606ddf42fd4edc558eeb48bfee66d2c591571d2.tar.xz | |
remove the v850 port
Trying to compile the v850 port brings many compile errors, one of them exists
since at least kernel 2.6.19.
There also seems to be noone willing to bring this port back into a usable
state.
This patch therefore removes the v850 port.
If anyone ever decides to revive the v850 port the code will still be
available from older kernels, and it wouldn't be impossible for the port to
reenter the kernel if it would become actively maintained again.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-v850/v850e_cache.h')
| -rw-r--r-- | include/asm-v850/v850e_cache.h | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/include/asm-v850/v850e_cache.h b/include/asm-v850/v850e_cache.h deleted file mode 100644 index aa7d7eb9da50..000000000000 --- a/include/asm-v850/v850e_cache.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-v850/v850e_cache.h -- Cache control for V850E cache memories - * - * Copyright (C) 2001,03 NEC Electronics Corporation - * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader <miles@gnu.org> - */ - -/* This file implements cache control for the rather simple cache used on - some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2 - CPU. V850E2 processors have their own (better) cache - implementation. */ - -#ifndef __V850_V850E_CACHE_H__ -#define __V850_V850E_CACHE_H__ - -#include <asm/types.h> - - -/* Cache control registers. */ -#define V850E_CACHE_BHC_ADDR 0xFFFFF06A -#define V850E_CACHE_BHC (*(volatile u16 *)V850E_CACHE_BHC_ADDR) -#define V850E_CACHE_ICC_ADDR 0xFFFFF070 -#define V850E_CACHE_ICC (*(volatile u16 *)V850E_CACHE_ICC_ADDR) -#define V850E_CACHE_ISI_ADDR 0xFFFFF072 -#define V850E_CACHE_ISI (*(volatile u16 *)V850E_CACHE_ISI_ADDR) -#define V850E_CACHE_DCC_ADDR 0xFFFFF078 -#define V850E_CACHE_DCC (*(volatile u16 *)V850E_CACHE_DCC_ADDR) - -/* Size of a cache line in bytes. */ -#define V850E_CACHE_LINE_SIZE 16 - -/* For <asm/cache.h> */ -#define L1_CACHE_BYTES V850E_CACHE_LINE_SIZE - - -#if defined(__KERNEL__) && !defined(__ASSEMBLY__) -/* Set caching params via the BHC, ICC, and DCC registers. */ -void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc); -#endif /* __KERNEL__ && !__ASSEMBLY__ */ - - -#endif /* __V850_V850E_CACHE_H__ */ |