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| author | David S. Miller <davem@davemloft.net> | 2005-05-24 02:52:08 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2005-05-24 02:52:08 +0400 |
| commit | 816242da3735957bee99aeba40aa60c4f120a101 (patch) | |
| tree | c5a1092a52911143b0c4f9bc4257c1dbafbb8bdd /include/asm-sparc64/spitfire.h | |
| parent | ab3fc403633c38aef5ef48844f8e5dbfee7c34f8 (diff) | |
| download | linux-816242da3735957bee99aeba40aa60c4f120a101.tar.xz | |
[SPARC64]: Add boot option to force UltraSPARC-III P-Cache on.
Older UltraSPARC-III chips have a P-Cache bug that makes us disable it
by default at boot time.
However, this does hurt performance substantially, particularly with
memcpy(), and the bug is _incredibly_ obscure. I have never seen it
triggered in practice, ever.
So provide a "-P" boot option that forces the P-Cache on. It taints
the kernel, so if it does trigger and cause some data corruption or
OOPS, we will find out in the logs that this option was on when it
happened.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/spitfire.h')
| -rw-r--r-- | include/asm-sparc64/spitfire.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index ad78ce64d69e..9d7613eea812 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h @@ -48,6 +48,9 @@ enum ultra_tlb_layout { extern enum ultra_tlb_layout tlb_type; +extern int cheetah_pcache_forced_on; +extern void cheetah_enable_pcache(void); + #define sparc64_highest_locked_tlbent() \ (tlb_type == spitfire ? \ SPITFIRE_HIGHEST_LOCKED_TLBENT : \ |