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authorPaul Mundt <lethal@linux-sh.org>2006-02-01 14:06:04 +0300
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-01 19:53:20 +0300
commit8d27e08191379b7a3302a33a6efdb8bdfd319c95 (patch)
treedd63b12706e849bdb494b0cdd2f11e60feb9ca91 /include/asm-sh/irq-sh7780.h
parent50373c1b7ee9cdd9b8ccaa1b58d13ad43f879908 (diff)
downloadlinux-8d27e08191379b7a3302a33a6efdb8bdfd319c95.tar.xz
[PATCH] sh: drop maskpos from make_ipr_irq(), remove duplicate irq definitions
Clean up some of the subtype IRQ definitions for IPR IRQ, and consolidate the make_ipr_irq() definitions by dropping maskpos. SH-4A was the only thing interested in the maskpos, and this should be handled through INTC2 rather than IPR. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-sh/irq-sh7780.h')
-rw-r--r--include/asm-sh/irq-sh7780.h23
1 files changed, 0 insertions, 23 deletions
diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h
index 8c8ca1281084..7f90315cd830 100644
--- a/include/asm-sh/irq-sh7780.h
+++ b/include/asm-sh/irq-sh7780.h
@@ -299,29 +299,6 @@
#define GPIO_IPR_POS 2
#define GPIO_PRIORITY 3
-/* ONCHIP_NR_IRQS */
-#define NR_IRQS 150 /* 111 + 16 */
-
-/* In a generic kernel, NR_IRQS is an upper bound, and we should use
- * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
- */
-#define ACTUAL_NR_IRQS NR_IRQS
-
-extern void disable_irq(unsigned int);
-extern void disable_irq_nosync(unsigned int);
-extern void enable_irq(unsigned int);
-
-/*
- * Simple Mask Register Support
- */
-extern void make_maskreg_irq(unsigned int irq);
-extern unsigned short *irq_mask_register;
-
-/*
- * Function for "on chip support modules".
- */
-extern void make_imask_irq(unsigned int irq);
-
#define INTC_TMU0_MSK 0
#define INTC_TMU3_MSK 1
#define INTC_RTC_MSK 2