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author | Randolph Chung <tausq@debian.org> | 2006-12-12 16:51:54 +0300 |
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committer | Kyle McMartin <kyle@athena.road.mcmartin.ca> | 2007-02-17 08:41:30 +0300 |
commit | d6ce8626dbc7d277d29b62e31c24ce777c60546b (patch) | |
tree | 1078d6aa204de1bc5d64a9595c7c1599fcd6eb52 /include/asm-parisc/cache.h | |
parent | 592ac93a607109e0643da6c23ae07ac749e973b1 (diff) | |
download | linux-d6ce8626dbc7d277d29b62e31c24ce777c60546b.tar.xz |
[PARISC] Clean up the cache and tlb headers
No changes in functionality.
Signed-off-by: Randolph Chung <tausq@debian.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/cache.h')
-rw-r--r-- | include/asm-parisc/cache.h | 29 |
1 files changed, 5 insertions, 24 deletions
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h index 7d22fa206fc4..32c2cca74345 100644 --- a/include/asm-parisc/cache.h +++ b/include/asm-parisc/cache.h @@ -30,31 +30,11 @@ #define __read_mostly __attribute__((__section__(".data.read_mostly"))) -extern void flush_data_cache_local(void *); /* flushes local data-cache only */ -extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */ -#ifdef CONFIG_SMP -extern void flush_data_cache(void); /* flushes data-cache only (all processors) */ -extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ -#else -#define flush_data_cache() flush_data_cache_local(NULL) -#define flush_instruction_cache() flush_instruction_cache_local(NULL) -#endif - -extern void parisc_cache_init(void); /* initializes cache-flushing */ -extern void flush_all_caches(void); /* flush everything (tlb & cache) */ -extern int get_cache_info(char *); -extern void flush_user_icache_range_asm(unsigned long, unsigned long); -extern void flush_kernel_icache_range_asm(unsigned long, unsigned long); -extern void flush_user_dcache_range_asm(unsigned long, unsigned long); -extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long); -extern void flush_kernel_dcache_page_asm(void *); -extern void flush_kernel_icache_page(void *); -extern void disable_sr_hashing(void); /* turns off space register hashing */ -extern void disable_sr_hashing_asm(int); /* low level support for above */ -extern void free_sid(unsigned long); +void parisc_cache_init(void); /* initializes cache-flushing */ +void disable_sr_hashing_asm(int); /* low level support for above */ +void disable_sr_hashing(void); /* turns off space register hashing */ +void free_sid(unsigned long); unsigned long alloc_sid(void); -extern void flush_user_dcache_page(unsigned long); -extern void flush_user_icache_page(unsigned long); struct seq_file; extern void show_cache_info(struct seq_file *m); @@ -63,6 +43,7 @@ extern int split_tlb; extern int dcache_stride; extern int icache_stride; extern struct pdc_cache_info cache_info; +void parisc_setup_cache_timing(void); #define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr)); #define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr)); |