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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-06-25 20:14:01 +0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 20:33:03 +0400 |
commit | 5ddcb3c35be995517a32799796e2acda90a784e0 (patch) | |
tree | fc0f6130b72aca477a9c52a0d1f9443c1968bc63 /include/asm-mips/io.h | |
parent | bb33b19ff92aed11fb56435be4c5d5231598a948 (diff) | |
download | linux-5ddcb3c35be995517a32799796e2acda90a784e0.tar.xz |
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached). Controllers on these SoCs are
placed in this segment.
This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/io.h')
-rw-r--r-- | include/asm-mips/io.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 92ec2618560c..12bcc1f9fba9 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -178,6 +178,11 @@ extern void __iounmap(const volatile void __iomem *addr); static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, unsigned long flags) { + void __iomem *addr = plat_ioremap(offset, size, flags); + + if (addr) + return addr; + #define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) if (cpu_has_64bit_addresses) { @@ -282,6 +287,9 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, static inline void iounmap(const volatile void __iomem *addr) { + if (plat_iounmap(addr)) + return; + #define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) if (cpu_has_64bit_addresses || |