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| author | David Woodhouse <dwmw2@infradead.org> | 2006-04-26 15:56:16 +0400 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2006-04-26 15:56:16 +0400 |
| commit | 62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f (patch) | |
| tree | e85ca2d0dd43f90dccf758338764c3caa55f333f /include/asm-mips/bcache.h | |
| parent | 089f26d5e31b7bf42a9a8fefec08b30cd27f4b0e (diff) | |
| download | linux-62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f.tar.xz | |
Don't include linux/config.h from anywhere else in include/
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'include/asm-mips/bcache.h')
| -rw-r--r-- | include/asm-mips/bcache.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/asm-mips/bcache.h b/include/asm-mips/bcache.h index 446102b34f4e..3646a3f2ed38 100644 --- a/include/asm-mips/bcache.h +++ b/include/asm-mips/bcache.h @@ -9,7 +9,6 @@ #ifndef _ASM_BCACHE_H #define _ASM_BCACHE_H -#include <linux/config.h> /* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent, chipset implemented caches. On machines with other CPUs the CPU does the |