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authorDmitry Torokhov <dtor@insightbb.com>2006-12-08 09:07:56 +0300
committerDmitry Torokhov <dtor@insightbb.com>2006-12-08 09:07:56 +0300
commitbef986502fa398b1785a3979b1aa17cd902d3527 (patch)
treeb59c1afe7b1dfcc001b86e54863f550d7ddc8c34 /include/asm-m68knommu/m520xsim.h
parent4bdbd2807deeccc0793d57fb5120d7a53f2c0b3c (diff)
parentc99767974ebd2a719d849fdeaaa1674456f5283f (diff)
downloadlinux-bef986502fa398b1785a3979b1aa17cd902d3527.tar.xz
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: drivers/usb/input/hid.h
Diffstat (limited to 'include/asm-m68knommu/m520xsim.h')
-rw-r--r--include/asm-m68knommu/m520xsim.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h
index 1dac22ea95ba..49d016e6391a 100644
--- a/include/asm-m68knommu/m520xsim.h
+++ b/include/asm-m68knommu/m520xsim.h
@@ -31,6 +31,16 @@
#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
+/*
+ * SDRAM configuration registers.
+ */
+#define MCFSIM_SDMR 0x000a8000 /* SDRAM Mode/Extended Mode Register */
+#define MCFSIM_SDCR 0x000a8004 /* SDRAM Control Register */
+#define MCFSIM_SDCFG1 0x000a8008 /* SDRAM Configuration Register 1 */
+#define MCFSIM_SDCFG2 0x000a800c /* SDRAM Configuration Register 2 */
+#define MCFSIM_SDCS0 0x000a8110 /* SDRAM Chip Select 0 Configuration */
+#define MCFSIM_SDCS1 0x000a8114 /* SDRAM Chip Select 1 Configuration */
+
#define MCF_GPIO_PAR_UART (0xA4036)
#define MCF_GPIO_PAR_FECI2C (0xA4033)
@@ -47,7 +57,7 @@
#define ICR_INTRCONF 0x05
#define MCFPIT_IMR MCFINTC_IMRL
-#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
+#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
/****************************************************************************/
#endif /* m520xsim_h */