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| author | Ingo Molnar <mingo@elte.hu> | 2008-09-10 13:32:52 +0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-09-10 13:32:52 +0400 |
| commit | e92b4fdacc6a7d8cc7895b81347671d5fcd6c5e1 (patch) | |
| tree | 4f84567261682d8ec2ad4102bce1ff970a6eed1a /include/asm-blackfin/cache.h | |
| parent | 9fcaff0e660d886e9a766460adbe558dd25de31b (diff) | |
| parent | adee14b2e1557d0a8559f29681732d05a89dfc35 (diff) | |
| download | linux-e92b4fdacc6a7d8cc7895b81347671d5fcd6c5e1.tar.xz | |
Merge commit 'v2.6.27-rc6' into x86/iommu
Diffstat (limited to 'include/asm-blackfin/cache.h')
| -rw-r--r-- | include/asm-blackfin/cache.h | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/include/asm-blackfin/cache.h b/include/asm-blackfin/cache.h deleted file mode 100644 index 023d72133b5a..000000000000 --- a/include/asm-blackfin/cache.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * include/asm-blackfin/cache.h - */ -#ifndef __ARCH_BLACKFIN_CACHE_H -#define __ARCH_BLACKFIN_CACHE_H - -/* - * Bytes per L1 cache line - * Blackfin loads 32 bytes for cache - */ -#define L1_CACHE_SHIFT 5 -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -/* - * Put cacheline_aliged data to L1 data memory - */ -#ifdef CONFIG_CACHELINE_ALIGNED_L1 -#define __cacheline_aligned \ - __attribute__((__aligned__(L1_CACHE_BYTES), \ - __section__(".data_l1.cacheline_aligned"))) -#endif - -/* - * largest L1 which this arch supports - */ -#define L1_CACHE_SHIFT_MAX 5 - -#endif |