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| author | James Bottomley <jejb@titanic.(none)> | 2005-11-10 17:29:07 +0300 |
|---|---|---|
| committer | James Bottomley <jejb@titanic.(none)> | 2005-11-10 17:29:07 +0300 |
| commit | 8a87a0b6313109d2fea87b1271d497c954ce2ca8 (patch) | |
| tree | 1b7ae51ff681e27118590e9cab4bf0ce38f5d80e /include/asm-arm/assembler.h | |
| parent | e6a04466ba965875a6132700fabb2f2c0249c41a (diff) | |
| parent | 3b44f137b9a846c5452d9e6e1271b79b1dbcc942 (diff) | |
| download | linux-8a87a0b6313109d2fea87b1271d497c954ce2ca8.tar.xz | |
Merge by hand (whitespace conflicts in libata.h)
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'include/asm-arm/assembler.h')
| -rw-r--r-- | include/asm-arm/assembler.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index 69a28f96bee2..f31ac92b6c7f 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -83,10 +83,13 @@ * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. */ - .macro save_and_disable_irqs, oldcpsr, temp + .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr - mov \temp, #PSR_I_BIT | MODE_SVC - msr cpsr_c, \temp +#if __LINUX_ARM_ARCH__ >= 6 + cpsid i +#else + msr cpsr_c, #PSR_I_BIT | MODE_SVC +#endif .endm /* |