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| author | Chris Brandt <chris.brandt@renesas.com> | 2017-01-25 23:28:10 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-03-06 12:06:49 +0300 |
| commit | 3d2abda02ad2d06d5f22de7f6b0f39126670bc48 (patch) | |
| tree | 5adaf6511469fdb96bbea9dd6fbf9ae5b62a1123 /fs | |
| parent | c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201 (diff) | |
| download | linux-3d2abda02ad2d06d5f22de7f6b0f39126670bc48.tar.xz | |
ARM: dts: r7s72100: update sdhi clock bindings
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
need to be enabled/disabled for proper operation. This fixes the fact that
the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
that all 4 clock sources need to be defined an used.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'fs')
0 files changed, 0 insertions, 0 deletions