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| author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-05-09 22:41:38 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-09 22:41:38 +0300 |
| commit | 9f65fb29374ee37856dbad847b4e121aab72b510 (patch) | |
| tree | be99b8bc2090f8c5b92f0c4be65eea4e6d6f1510 /fs/proc | |
| parent | f21b53b20c754021935ea43364dbf53778eeba32 (diff) | |
| download | linux-9f65fb29374ee37856dbad847b4e121aab72b510.tar.xz | |
x86/bugs: Rename _RDS to _SSBD
Intel collateral will reference the SSB mitigation bit in IA32_SPEC_CTL[2]
as SSBD (Speculative Store Bypass Disable).
Hence changing it.
It is unclear yet what the MSR_IA32_ARCH_CAPABILITIES (0x10a) Bit(4) name
is going to be. Following the rename it would be SSBD_NO but that rolls out
to Speculative Store Bypass Disable No.
Also fixed the missing space in X86_FEATURE_AMD_SSBD.
[ tglx: Fixup x86_amd_rds_enable() and rds_tif_to_amd_ls_cfg() as well ]
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'fs/proc')
0 files changed, 0 insertions, 0 deletions