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author | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-24 17:14:42 +0400 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-25 16:12:15 +0400 |
commit | 72c5839515260dce966cd24f54436e6583288e6c (patch) | |
tree | f6a65a5899490397eaa8c6a609452d365f05273d /fs/libfs.c | |
parent | ecb3c2bbf233d0c8d6e48009afa52c45c0204857 (diff) | |
download | linux-72c5839515260dce966cd24f54436e6583288e6c.tar.xz |
arm64: gicv3: Allow GICv3 compilation with older binutils
GICv3 introduces new system registers accessible with the full msr/mrs
syntax (e.g. mrs x0, Sop0_op1_CRm_CRn_op2). However, only recent
binutils understand the new syntax. This patch introduces msr_s/mrs_s
assembly macros which generate the equivalent instructions above and
converts the existing GICv3 code (both drivers/irqchip/ and
arch/arm64/kernel/).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Olof Johansson <olof@lixom.net>
Tested-by: Olof Johansson <olof@lixom.net>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'fs/libfs.c')
0 files changed, 0 insertions, 0 deletions