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authorChristoffer Dall <christoffer.dall@linaro.org>2014-11-19 14:23:54 +0300
committerPaolo Bonzini <pbonzini@redhat.com>2014-11-26 16:40:43 +0300
commitdb7dedd0de714a59d8fa2a1be3b6b00543ad415a (patch)
tree2a38a73b5fedb2561feee5497fdeafeba8e78fd4 /fs/btrfs/xattr.h
parent7cbb87d67e38cfc55680290a706fd7517f10050d (diff)
downloadlinux-db7dedd0de714a59d8fa2a1be3b6b00543ad415a.tar.xz
arm64: KVM: Handle traps of ICC_SRE_EL1 as RAZ/WI
When running on a system with a GICv3, we currenly don't allow the guest to access the system register interface of the GICv3. We do this by clearing the ICC_SRE_EL2.Enable, which causes all guest accesses to ICC_SRE_EL1 to trap to EL2 and causes all guest accesses to other ICC_ registers to cause an undefined exception in the guest. However, we currently don't handle the trap of guest accesses to ICC_SRE_EL1 and will spill out a warning. The trap just needs to handle the access as RAZ/WI, and a guest that tries to prod this register and set ICC_SRE_EL1.SRE=1, must read back the value (which Linux already does) to see if it succeeded, and will thus observe that ICC_SRE_EL1.SRE was not set. Add the simple trap handler in the sorted table of the system registers. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> [ardb: added cp15 handling] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'fs/btrfs/xattr.h')
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