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| author | Shiraz Hashim <shiraz.hashim@st.com> | 2012-11-07 18:37:25 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-11 22:36:04 +0400 |
| commit | 826d6ca8f955c7a902e775acef3bdbfc93695b04 (patch) | |
| tree | acfea21f3a3d52e0cfc706028394a4283fa6eb1b /firmware | |
| parent | 6bb0700bfe124f3ee245da24b5bb35152d2e6bfc (diff) | |
| download | linux-826d6ca8f955c7a902e775acef3bdbfc93695b04.tar.xz | |
pinctrl: SPEAr: Add SoC specific gpio configuration routines
Different SPEAr SoCs have different approach to configure pins as gpios. Some
configure a group of gpios with single register bit and others have one bit per
gpio pin. Only earlier one is implemented till now, this patch adds support for
later one.
Here we add callbacks to SoC specific code to configure gpios in
gpio_request_enable(). That will do additional SoC specific configuration to
enable gpio pins.
We also implement this callback for SPEAr1340 in this patch.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'firmware')
0 files changed, 0 insertions, 0 deletions