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authorRob Clark <robdclark@gmail.com>2016-11-07 21:31:30 +0300
committerRob Clark <robdclark@gmail.com>2016-11-27 19:35:07 +0300
commitc83ea576010d513898c27121e5f8ac355a8eef05 (patch)
tree6946ee78f16ca7f02810bb83112298c43dae02d4 /drivers
parentd8dd80526c9097bd60464982a011150b1b213d06 (diff)
downloadlinux-c83ea576010d513898c27121e5f8ac355a8eef05.tar.xz
drm/msm: set dma_mask properly
Previous value really only made sense on armv7 without LPAE. Everything that supports more than 4g of memory also has iommu's that can map anything. Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index a2cc990bc7c2..10755a1c53b8 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1038,7 +1038,13 @@ static int msm_pdev_probe(struct platform_device *pdev)
if (ret)
return ret;
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
+ /* on all devices that I am aware of, iommu's which can map
+ * any address the cpu can see are used:
+ */
+ ret = dma_set_mask_and_coherent(&pdev->dev, ~0);
+ if (ret)
+ return ret;
+
return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
}