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authorOlof Johansson <olof@lixom.net>2014-05-27 00:24:56 +0400
committerOlof Johansson <olof@lixom.net>2014-05-27 00:24:56 +0400
commit2ca602de42863436cce275dde35c22496344d539 (patch)
tree9111b81359168bb61767101fb71219a3a6416fd6 /drivers
parent98954f4b122c2c5ac03bb3d21fd171a062dc294f (diff)
parent57b05572267581c2320462e9b606709fa6da4c5a (diff)
downloadlinux-2ca602de42863436cce275dde35c22496344d539.tar.xz
Merge tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "ARM: omap pm changes for v3.16 merge window, resend" from Tony Lindgren: PM related fixes for omap3 that were discovered during omap3 conversion to device tree. This series sets up the PMIC signaling in a way where we can test for PM regressions easily by looking at state of the the sys_clkreq and sys_off_mode pins. Note that this series alone does not make omap3 PM to cut off core voltage during off-idle, changes to twl4030-power.c configurations are still needed. Those will be posted separately. * tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Enable CPUidle in omap2plus_defconfig ARM: dts: Enable N900 keyboard sleep leds by default ARM: OMAP2+: Fix voltage scaling init for device tree ARM: dts: Configure omap3 twl4030 I2C4 pins by default ARM: OMAP3: Fix voltage control for deeper idle states ARM: OMAP3: Disable broken omap3_set_off_timings function ARM: OMAP3: Fix idle mode signaling for sys_clkreq and sys_off_mode ARM: dts: Fix omap serial wake-up when booted with device tree mfd: twl-core: Fix idle mode signaling for omaps when booted with device tree Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/twl-core.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index e87140bef667..db11b4f40611 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -98,7 +98,11 @@
#define TWL4030_BASEADD_BACKUP 0x0014
#define TWL4030_BASEADD_INT 0x002E
#define TWL4030_BASEADD_PM_MASTER 0x0036
+
#define TWL4030_BASEADD_PM_RECEIVER 0x005B
+#define TWL4030_DCDC_GLOBAL_CFG 0x06
+#define SMARTREFLEX_ENABLE BIT(3)
+
#define TWL4030_BASEADD_RTC 0x001C
#define TWL4030_BASEADD_SECURED_REG 0x0000
@@ -1204,6 +1208,11 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
* Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
* SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
+ *
+ * Also, always enable SmartReflex bit as that's needed for omaps to
+ * to do anything over I2C4 for voltage scaling even if SmartReflex
+ * is disabled. Without the SmartReflex bit omap sys_clkreq idle
+ * signal will never trigger for retention idle.
*/
if (twl_class_is_4030()) {
u8 temp;
@@ -1212,6 +1221,12 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
+
+ twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
+ TWL4030_DCDC_GLOBAL_CFG);
+ temp |= SMARTREFLEX_ENABLE;
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
+ TWL4030_DCDC_GLOBAL_CFG);
}
if (node) {