diff options
| author | Alan Cox <alan@linux.intel.com> | 2012-04-25 17:38:32 +0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-04-27 12:24:21 +0400 |
| commit | ae0a246aef0d185db2947912fe9cf7dae1d91b7a (patch) | |
| tree | 05c7256420a977a3dc3d1792de34d5be47a51060 /drivers | |
| parent | 68cb638f9219eeb4967adf08587f4aba64923c3a (diff) | |
| download | linux-ae0a246aef0d185db2947912fe9cf7dae1d91b7a.tar.xz | |
gma500: Add the base elements of CDV hotplug support
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/gma500/cdv_device.c | 41 | ||||
| -rw-r--r-- | drivers/gpu/drm/gma500/psb_drv.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/gma500/psb_intel_reg.h | 5 |
3 files changed, 48 insertions, 3 deletions
diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c index 5cc06a8fcb7a..62f9b735459b 100644 --- a/drivers/gpu/drm/gma500/cdv_device.c +++ b/drivers/gpu/drm/gma500/cdv_device.c @@ -462,13 +462,48 @@ static void cdv_get_core_freq(struct drm_device *dev) } } +static void cdv_hotplug_work_func(struct work_struct *work) +{ + struct drm_psb_private *dev_priv = container_of(work, struct drm_psb_private, + hotplug_work); + struct drm_device *dev = dev_priv->dev; + + /* Just fire off a uevent and let userspace tell us what to do */ + drm_helper_hpd_irq_event(dev); +} + +/* The core driver has received a hotplug IRQ. We are in IRQ context + so extract the needed information and kick off queued processing */ + +static int cdv_hotplug_event(struct drm_device *dev) +{ + struct drm_psb_private *dev_priv = dev->dev_private; + schedule_work(&dev_priv->hotplug_work); + REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); + return 1; +} + +static void cdv_hotplug_enable(struct drm_device *dev, bool on) +{ + if (on) { + u32 hotplug = REG_READ(PORT_HOTPLUG_EN); + hotplug |= HDMIB_HOTPLUG_INT_EN | HDMIC_HOTPLUG_INT_EN | + HDMID_HOTPLUG_INT_EN | CRT_HOTPLUG_INT_EN; + REG_WRITE(PORT_HOTPLUG_EN, hotplug); + } else { + REG_WRITE(PORT_HOTPLUG_EN, 0); + REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); + } +} + static int cdv_chip_setup(struct drm_device *dev) { + struct drm_psb_private *dev_priv = dev->dev_private; + INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func); cdv_get_core_freq(dev); gma_intel_opregion_init(dev); psb_intel_init_bios(dev); - REG_WRITE(PORT_HOTPLUG_EN, 0); - REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); + cdv_hotplug_enable(dev, false); return 0; } @@ -489,6 +524,8 @@ const struct psb_ops cdv_chip_ops = { .crtc_funcs = &cdv_intel_crtc_funcs, .output_init = cdv_output_init, + .hotplug = cdv_hotplug_event, + .hotplug_enable = cdv_hotplug_enable, #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE .backlight_init = cdv_backlight_init, diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h index ab483c34c751..d3528a694206 100644 --- a/drivers/gpu/drm/gma500/psb_drv.h +++ b/drivers/gpu/drm/gma500/psb_drv.h @@ -626,6 +626,11 @@ struct drm_psb_private { uint32_t msi_addr; uint32_t msi_data; + /* + * Hotplug handling + */ + + struct work_struct hotplug_work; /* * LID-Switch diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h index cbd8aee2b7ed..519a9cd9ffbc 100644 --- a/drivers/gpu/drm/gma500/psb_intel_reg.h +++ b/drivers/gpu/drm/gma500/psb_intel_reg.h @@ -219,7 +219,7 @@ #define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ #define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ -#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ +#define DPLL_FPA0h1_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ #define DPLL_LOCK (1 << 15) /* CDV */ /* @@ -346,6 +346,9 @@ #define FP_M2_DIV_SHIFT 0 #define PORT_HOTPLUG_EN 0x61110 +#define HDMIB_HOTPLUG_INT_EN (1 << 29) +#define HDMIC_HOTPLUG_INT_EN (1 << 28) +#define HDMID_HOTPLUG_INT_EN (1 << 27) #define SDVOB_HOTPLUG_INT_EN (1 << 26) #define SDVOC_HOTPLUG_INT_EN (1 << 25) #define TV_HOTPLUG_INT_EN (1 << 18) |