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authorChen-Yu Tsai <wens@csie.org>2016-05-29 10:04:44 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2016-06-02 11:40:20 +0300
commitafefc102df1bf5b75d7106771ecbe0ef546edc96 (patch)
tree42e1aadddf87f1323d885dc51f650b4c55b17ad0 /drivers
parent0175249efa9310eed79650209600a75ace656bc9 (diff)
downloadlinux-afefc102df1bf5b75d7106771ecbe0ef546edc96.tar.xz
mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80
Now the the HS-DDR mode clock timings have been corrected, we can re-enable these modes on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/sunxi-mmc.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 5873dc344ab2..2ee4c21ec55e 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1129,11 +1129,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
- /* TODO MMC DDR is not working on A80 */
- if (of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun9i-a80-mmc"))
- mmc->caps &= ~MMC_CAP_1_8V_DDR;
-
ret = mmc_of_parse(mmc);
if (ret)
goto error_free_dma;