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authorRodrigo Vivi <rodrigo.vivi@intel.com>2015-01-12 21:14:28 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-01-15 03:35:38 +0300
commit46c3fce60be8d14ce4d18cad93d94788480c7a87 (patch)
treef934fadcdb2a01ad300cf3029fdc9698609a595c /drivers
parentcd52471999ef08bca35568525c1d85d883ffedb6 (diff)
downloadlinux-46c3fce60be8d14ce4d18cad93d94788480c7a87.tar.xz
drm/i915: VLV/CHV PSR needs to exit PSR on every flush.
ON these platforms we don't have hardware tracking working for any case. So we need to fake this on software by forcing psr to exit on every flush. Manual tests indicated this was needed. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Durgadoss R <durgadoss.r@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_psr.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index dd0e6e0447d4..afb8b8ce8d9f 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -620,13 +620,11 @@ void intel_psr_flush(struct drm_device *dev,
/*
* On Valleyview and Cherryview we don't use hardware tracking so
- * sprite plane updates or cursor moves don't result in a PSR
+ * any plane updates or cursor moves don't result in a PSR
* invalidating. Which means we need to manually fake this in
* software for all flushes, not just when we've seen a preceding
* invalidation through frontbuffer rendering. */
- if (!HAS_DDI(dev) &&
- ((frontbuffer_bits & INTEL_FRONTBUFFER_SPRITE(pipe)) ||
- (frontbuffer_bits & INTEL_FRONTBUFFER_CURSOR(pipe))))
+ if (!HAS_DDI(dev))
intel_psr_exit(dev);
if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)