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| author | Thierry Reding <treding@nvidia.com> | 2015-05-13 16:16:55 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-05-13 16:16:55 +0300 |
| commit | 07aaa0e5632d3434d1a8e88f0db0bee1c84eb1d7 (patch) | |
| tree | dbb31e0eb394cfa6079e1bfbadf571b5dc772f12 /drivers | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
| parent | 6ea2609ab386f6bfeebc39e1418b7497a9deb55c (diff) | |
| download | linux-07aaa0e5632d3434d1a8e88f0db0bee1c84eb1d7.tar.xz | |
Merge branch 'for-4.2/ramcode' into for-4.2/clk
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/soc/tegra/fuse/tegra-apbmisc.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index 3bf5aba4caaa..73fad05d8f2c 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -28,8 +28,15 @@ #define APBMISC_SIZE 0x64 #define FUSE_SKU_INFO 0x10 +#define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4 +#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \ + (0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) +#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \ + (0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) + static void __iomem *apbmisc_base; static void __iomem *strapping_base; +static bool long_ram_code; u32 tegra_read_chipid(void) { @@ -54,6 +61,18 @@ u32 tegra_read_straps(void) return 0; } +u32 tegra_read_ram_code(void) +{ + u32 straps = tegra_read_straps(); + + if (long_ram_code) + straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG; + else + straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT; + + return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT; +} + static const struct of_device_id apbmisc_match[] __initconst = { { .compatible = "nvidia,tegra20-apbmisc", }, {}, @@ -112,4 +131,6 @@ void __init tegra_init_apbmisc(void) strapping_base = of_iomap(np, 1); if (!strapping_base) pr_err("ioremap tegra strapping_base failed\n"); + + long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code"); } |