diff options
| author | CQ Tang <cq.tang@intel.com> | 2016-01-14 00:15:03 +0300 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2016-02-25 12:49:11 +0300 |
| commit | d11bce1f90f52c278a53c127cf65fbfe294f3594 (patch) | |
| tree | 8386038300700210eaf35be3d84a5ca90e975ee6 /drivers | |
| parent | 7acdc7b409aa4fbb87a5abdaabadbb25e69fba06 (diff) | |
| download | linux-d11bce1f90f52c278a53c127cf65fbfe294f3594.tar.xz | |
iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG
commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream.
This is a 32-bit register. Apparently harmless on real hardware, but
causing justified warnings in simulation.
Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/iommu/dmar.c | 2 | ||||
| -rw-r--r-- | drivers/iommu/intel_irq_remapping.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 785675a56a10..ba5d1a37a90d 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -972,7 +972,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index b97d70b1abe0..0ff40be0f3b2 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -495,7 +495,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end; |