diff options
author | Eric Miao <eric.miao@marvell.com> | 2008-12-24 06:32:45 +0300 |
---|---|---|
committer | Eric Miao <eric.miao@marvell.com> | 2008-12-29 12:58:00 +0300 |
commit | 28a623855f737a905b90a1616107ad813bfcd6e9 (patch) | |
tree | 788d7454da490c2c4e8a29e53fbecf0f7b1f1777 /drivers/watchdog/sa1100_wdt.c | |
parent | 6769717d5d51596618f6b143008d8ace11ec8a69 (diff) | |
download | linux-28a623855f737a905b90a1616107ad813bfcd6e9.tar.xz |
[ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant
See description of commit:
[ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant
for additional information.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'drivers/watchdog/sa1100_wdt.c')
-rw-r--r-- | drivers/watchdog/sa1100_wdt.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c index ed01e4c2beff..87977156ddb8 100644 --- a/drivers/watchdog/sa1100_wdt.c +++ b/drivers/watchdog/sa1100_wdt.c @@ -35,8 +35,7 @@ #include <mach/reset.h> #include <mach/hardware.h> -#define OSCR_FREQ CLOCK_TICK_RATE - +static unsigned long oscr_freq; static unsigned long sa1100wdt_users; static int pre_margin; static int boot_status; @@ -123,12 +122,12 @@ static long sa1100dog_ioctl(struct file *file, unsigned int cmd, break; } - pre_margin = OSCR_FREQ * time; + pre_margin = oscr_freq * time; OSMR3 = OSCR + pre_margin; /*fall through*/ case WDIOC_GETTIMEOUT: - ret = put_user(pre_margin / OSCR_FREQ, p); + ret = put_user(pre_margin / oscr_freq, p); break; } return ret; @@ -155,6 +154,8 @@ static int __init sa1100dog_init(void) { int ret; + oscr_freq = get_clock_tick_rate(); + /* * Read the reset status, and save it for later. If * we suspend, RCSR will be cleared, and the watchdog @@ -162,7 +163,7 @@ static int __init sa1100dog_init(void) */ boot_status = (reset_status & RESET_STATUS_WATCHDOG) ? WDIOF_CARDRESET : 0; - pre_margin = OSCR_FREQ * margin; + pre_margin = oscr_freq * margin; ret = misc_register(&sa1100dog_miscdev); if (ret == 0) |