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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-11-22 17:57:30 +0300
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2021-01-25 21:05:32 +0300
commit1b5b5b4eb52216af05ae4eebbe2efebed4f15a1c (patch)
tree1851ed8b47cdd5e149c2a93a4fdfd71ccad8b2c0 /drivers/watchdog/intel_scu_watchdog.h
parentc5158358dffc8c7962f412c2c89fcce4e5fff96f (diff)
downloadlinux-1b5b5b4eb52216af05ae4eebbe2efebed4f15a1c.tar.xz
watchdog: intel_scu_watchdog: Remove driver for deprecated platform
Intel Moorestown and Medfield are quite old Intel Atom based 32-bit platforms, which were in limited use in some Android phones, tablets and consumer electronics more than eight years ago. There are no bugs or problems ever reported outside from Intel for breaking any of that platforms for years. It seems no real users exists who run more or less fresh kernel on it. The commit 05f4434bc130 ("ASoC: Intel: remove mfld_machine") also in align with this theory. Due to above and to reduce a burden of supporting outdated drivers we remove the support of outdated platforms completely. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/watchdog/intel_scu_watchdog.h')
-rw-r--r--drivers/watchdog/intel_scu_watchdog.h50
1 files changed, 0 insertions, 50 deletions
diff --git a/drivers/watchdog/intel_scu_watchdog.h b/drivers/watchdog/intel_scu_watchdog.h
deleted file mode 100644
index fb12a25ee417..000000000000
--- a/drivers/watchdog/intel_scu_watchdog.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Intel_SCU 0.2: An Intel SCU IOH Based Watchdog Device
- * for Intel part #(s):
- * - AF82MP20 PCH
- *
- * Copyright (C) 2009-2010 Intel Corporation. All rights reserved.
- */
-
-#ifndef __INTEL_SCU_WATCHDOG_H
-#define __INTEL_SCU_WATCHDOG_H
-
-#define WDT_VER "0.3"
-
-/* minimum time between interrupts */
-#define MIN_TIME_CYCLE 1
-
-/* Time from warning to reboot is 2 seconds */
-#define DEFAULT_SOFT_TO_HARD_MARGIN 2
-
-#define MAX_TIME 170
-
-#define DEFAULT_TIME 5
-
-#define MAX_SOFT_TO_HARD_MARGIN (MAX_TIME-MIN_TIME_CYCLE)
-
-/* Ajustment to clock tick frequency to make timing come out right */
-#define FREQ_ADJUSTMENT 8
-
-struct intel_scu_watchdog_dev {
- ulong driver_open;
- ulong driver_closed;
- u32 timer_started;
- u32 timer_set;
- u32 threshold;
- u32 soft_threshold;
- u32 __iomem *timer_load_count_addr;
- u32 __iomem *timer_current_value_addr;
- u32 __iomem *timer_control_addr;
- u32 __iomem *timer_clear_interrupt_addr;
- u32 __iomem *timer_interrupt_status_addr;
- struct sfi_timer_table_entry *timer_tbl_ptr;
- struct notifier_block intel_scu_notifier;
- struct miscdevice miscdev;
-};
-
-extern int sfi_mtimer_num;
-
-/* extern struct sfi_timer_table_entry *sfi_get_mtmr(int hint); */
-#endif /* __INTEL_SCU_WATCHDOG_H */