summaryrefslogtreecommitdiff
path: root/drivers/video/pm2fb.c
diff options
context:
space:
mode:
authorKrzysztof Helt <krzysztof.h1@wp.pl>2007-05-08 11:39:57 +0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-08 22:15:33 +0400
commit9a31f0f7679aeaf79c613feaa3f4170741ccb218 (patch)
treeb65b02c7277df3bea83915f25f8e2d16ade8d5dd /drivers/video/pm2fb.c
parent76c7d3ffe3acddf5619bd796e0b8fa5dc6ecdb39 (diff)
downloadlinux-9a31f0f7679aeaf79c613feaa3f4170741ccb218.tar.xz
pm2fb: memclock setting corrections
This patch disables a memory clock setting if a board has been initialized by BIOS. This allows using the memory clock set by manufacturer of the board. This patch also sets default clock for 3dlabs Permedia 2V reference board's clock to 75MHz (BIOS setting for EONtronic Permedia 2Vboard), because the default 83MHz can be too high. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/pm2fb.c')
-rw-r--r--drivers/video/pm2fb.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/pm2fb.c b/drivers/video/pm2fb.c
index 33f17a96a569..539541946b25 100644
--- a/drivers/video/pm2fb.c
+++ b/drivers/video/pm2fb.c
@@ -1141,10 +1141,10 @@ static int __devinit pm2fb_probe(struct pci_dev *pdev,
default_par->mem_control, default_par->boot_address,
default_par->mem_config);
- default_par->memclock = CVPPC_MEMCLOCK;
if(default_par->mem_control == 0 &&
default_par->boot_address == 0x31 &&
default_par->mem_config == 0x259fffff) {
+ default_par->memclock = CVPPC_MEMCLOCK;
default_par->mem_control=0;
default_par->boot_address=0x20;
default_par->mem_config=0xe6002021;
@@ -1164,7 +1164,7 @@ static int __devinit pm2fb_probe(struct pci_dev *pdev,
DPRINTK("We have not been initialized by VGA BIOS "
"and are running on an 3dlabs reference board\n");
DPRINTK("Initializing card timings manually...\n");
- default_par->memclock=70000;
+ default_par->memclock=74894;
}
}