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authorArchit Taneja <archit@ti.com>2011-09-13 16:58:41 +0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-09-30 17:17:25 +0400
commitc3dc6a7afb47735b82a4c0061e814454a649dbfc (patch)
treed04f7a341aed9d9aae42d33479526f9d26c7e74b /drivers/video/omap2/dss/venc.c
parentdac57a05fcf4808bbc91a96a034cae84716f0077 (diff)
downloadlinux-c3dc6a7afb47735b82a4c0061e814454a649dbfc.tar.xz
OMAPDSS: DISPC: Get correct pixel clock for TV manager
dispc_mgr_pclk_rate() is used to calculate minimum required functional clock for scaling in calc_fclk() and calc_fclk_five_taps(). This function returns the correct pixel clock for LCD and LCD2 managers, but not for TV manager. Extend this function so that it gets the correct pixel clock for TV manager. This also prevents the crash we get when we try to scale overlays connected to TV manager. The current code leads to a BUG() being executed if we call dispc_mgr_pclk_rate() for the TV manager. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/venc.c')
-rw-r--r--drivers/video/omap2/dss/venc.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 53319580417c..7533458ba4d2 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -463,9 +463,11 @@ static void venc_power_off(struct omap_dss_device *dssdev)
regulator_disable(venc.vdda_dac_reg);
}
-
-
-
+unsigned long venc_get_pixel_clock(void)
+{
+ /* VENC Pixel Clock in Mhz */
+ return 13500000;
+}
/* driver */
static int venc_panel_probe(struct omap_dss_device *dssdev)