diff options
| author | Andres Salomon <dilinger@queued.net> | 2008-04-28 13:14:53 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-28 19:58:35 +0400 |
| commit | 32bf87e3697cf2f730b8fbf47cad903ceef718a2 (patch) | |
| tree | 6476a1f8796c28e7eb70deb7eaae75872f95fb6d /drivers/video/geode/lxfb_ops.c | |
| parent | 22af89aa0c0b4012a7431114a340efd3665a7617 (diff) | |
| download | linux-32bf87e3697cf2f730b8fbf47cad903ceef718a2.tar.xz | |
x86: geode: MSR cleanup
This cleans up a few MSR-using drivers in the following manner:
- Ensures MSRs are all defined in asm/geode.h, rather than in misc
places
- Makes the naming consistent; cs553[56] ones begin with MSR_,
GX-specific ones start with MSR_GX_, and LX-specific ones start
with MSR_LX_. Also, make the names match the data sheet.
- Use MSR names rather than numbers in source code
- Document the fact that the LX's MSR_PADSEL has the wrong value
in the data sheet. That's, uh, good to note.
Signed-off-by: Andres Salomon <dilinger@debian.org>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/geode/lxfb_ops.c')
| -rw-r--r-- | drivers/video/geode/lxfb_ops.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/geode/lxfb_ops.c index 4fbc99be96ef..a52c180062c8 100644 --- a/drivers/video/geode/lxfb_ops.c +++ b/drivers/video/geode/lxfb_ops.c @@ -13,6 +13,7 @@ #include <linux/fb.h> #include <linux/uaccess.h> #include <linux/delay.h> +#include <asm/geode.h> #include "lxfb.h" @@ -101,7 +102,7 @@ static void lx_set_dotpll(u32 pllval) u32 dotpll_lo, dotpll_hi; int i; - rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); + rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); if ((dotpll_lo & GLCP_DOTPLL_LOCK) && (dotpll_hi == pllval)) return; @@ -110,7 +111,7 @@ static void lx_set_dotpll(u32 pllval) dotpll_lo &= ~(GLCP_DOTPLL_BYPASS | GLCP_DOTPLL_HALFPIX); dotpll_lo |= GLCP_DOTPLL_RESET; - wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); + wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); /* Wait 100us for the PLL to lock */ @@ -119,7 +120,7 @@ static void lx_set_dotpll(u32 pllval) /* Now, loop for the lock bit */ for (i = 0; i < 1000; i++) { - rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); + rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); if (dotpll_lo & GLCP_DOTPLL_LOCK) break; } @@ -127,7 +128,7 @@ static void lx_set_dotpll(u32 pllval) /* Clear the reset bit */ dotpll_lo &= ~GLCP_DOTPLL_RESET; - wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); + wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); } /* Set the clock based on the frequency specified by the current mode */ @@ -255,7 +256,7 @@ static void lx_graphics_enable(struct fb_info *info) msrlo = DF_DEFAULT_TFT_PAD_SEL_LOW; msrhi = DF_DEFAULT_TFT_PAD_SEL_HIGH; - wrmsr(MSR_LX_DF_PADSEL, msrlo, msrhi); + wrmsr(MSR_LX_MSR_PADSEL, msrlo, msrhi); } if (par->output & OUTPUT_CRT) { @@ -321,7 +322,7 @@ void lx_set_mode(struct fb_info *info) /* Set output mode */ - rdmsrl(MSR_LX_DF_GLCONFIG, msrval); + rdmsrl(MSR_LX_GLD_MSR_CONFIG, msrval); msrval &= ~DF_CONFIG_OUTPUT_MASK; if (par->output & OUTPUT_PANEL) { @@ -335,7 +336,7 @@ void lx_set_mode(struct fb_info *info) msrval |= DF_OUTPUT_CRT; } - wrmsrl(MSR_LX_DF_GLCONFIG, msrval); + wrmsrl(MSR_LX_GLD_MSR_CONFIG, msrval); /* Clear the various buffers */ /* FIXME: Adjust for panning here */ @@ -383,13 +384,13 @@ void lx_set_mode(struct fb_info *info) /* Set default watermark values */ - rdmsrl(MSR_LX_DC_SPARE, msrval); + rdmsrl(MSR_LX_SPARE_MSR, msrval); msrval &= ~(DC_SPARE_DISABLE_CFIFO_HGO | DC_SPARE_VFIFO_ARB_SELECT | DC_SPARE_LOAD_WM_LPEN_MASK | DC_SPARE_WM_LPEN_OVRD | DC_SPARE_DISABLE_INIT_VID_PRI | DC_SPARE_DISABLE_VFIFO_WM); msrval |= DC_SPARE_DISABLE_VFIFO_WM | DC_SPARE_DISABLE_INIT_VID_PRI; - wrmsrl(MSR_LX_DC_SPARE, msrval); + wrmsrl(MSR_LX_SPARE_MSR, msrval); gcfg = DC_GCFG_DFLE; /* Display fifo enable */ gcfg |= 0xB600; /* Set default priority */ |