diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-08-06 17:16:32 +0400 |
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committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-11-12 14:40:21 +0300 |
commit | 3640d9fa7afa02940873d7d4c6c22915320d2a77 (patch) | |
tree | 1d39513d20247d69af4d5522815113fba1ae432e /drivers/video/fbdev/omap2/dss/dsi.c | |
parent | 7b71c410b2417acba49648ceaa6de38b00b05c88 (diff) | |
download | linux-3640d9fa7afa02940873d7d4c6c22915320d2a77.tar.xz |
OMAPDSS: DSI: remove clkin from dsi_clock_info
struct dsi_clock_info contains clkin field, which is the rate of the
PLL's input clock. This field is not needed, as it can be easily
retrieved by using the clk_get_rate().
This patch removes the clkin field.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/fbdev/omap2/dss/dsi.c')
-rw-r--r-- | drivers/video/fbdev/omap2/dss/dsi.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/drivers/video/fbdev/omap2/dss/dsi.c b/drivers/video/fbdev/omap2/dss/dsi.c index 1c5a15581669..deab4135ddc0 100644 --- a/drivers/video/fbdev/omap2/dss/dsi.c +++ b/drivers/video/fbdev/omap2/dss/dsi.c @@ -1486,8 +1486,7 @@ static int dsi_calc_clock_rates(struct platform_device *dsidev, if (cinfo->regm_dsi > dsi->regm_dsi_max) return -EINVAL; - cinfo->clkin = clk_get_rate(dsi->sys_clk); - cinfo->fint = cinfo->clkin / cinfo->regn; + cinfo->fint = clk_get_rate(dsi->sys_clk) / cinfo->regn; if (cinfo->fint > dsi->fint_max || cinfo->fint < dsi->fint_min) return -EINVAL; @@ -1548,7 +1547,6 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev, DSSDBG("DSI PLL clock config starts"); - dsi->current_cinfo.clkin = cinfo->clkin; dsi->current_cinfo.fint = cinfo->fint; dsi->current_cinfo.clkin4ddr = cinfo->clkin4ddr; dsi->current_cinfo.dsi_pll_hsdiv_dispc_clk = @@ -1563,13 +1561,13 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev, DSSDBG("DSI Fint %ld\n", cinfo->fint); - DSSDBG("clkin rate %ld\n", cinfo->clkin); + DSSDBG("clkin rate %ld\n", clk_get_rate(dsi->sys_clk)); /* DSIPHY == CLKIN4DDR */ DSSDBG("CLKIN4DDR = 2 * %d / %d * %lu = %lu\n", cinfo->regm, cinfo->regn, - cinfo->clkin, + clk_get_rate(dsi->sys_clk), cinfo->clkin4ddr); DSSDBG("Data rate on 1 DSI lane %ld Mbps\n", @@ -1771,7 +1769,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev, seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); - seq_printf(s, "dsi pll clkin\t%lu\n", cinfo->clkin); + seq_printf(s, "dsi pll clkin\t%lu\n", clk_get_rate(dsi->sys_clk)); seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); @@ -4780,7 +4778,6 @@ static bool dsi_cm_calc(struct dsi_data *dsi, ctx->req_pck_min = pck; ctx->req_pck_nom = pck; ctx->req_pck_max = pck * 3 / 2; - ctx->dsi_cinfo.clkin = clkin; pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); pll_max = cfg->hs_clk_max * 4; @@ -5066,8 +5063,6 @@ static bool dsi_vm_calc(struct dsi_data *dsi, ctx->dsidev = dsi->pdev; ctx->config = cfg; - ctx->dsi_cinfo.clkin = clkin; - /* these limits should come from the panel driver */ ctx->req_pck_min = t->pixelclock - 1000; ctx->req_pck_nom = t->pixelclock; |