diff options
| author | Jon Povey <jon.povey@racelogic.co.uk> | 2012-05-25 05:50:18 +0400 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2012-06-04 19:29:42 +0400 |
| commit | 6594b2d7b1ef8260e6e36ddc96bd37a40e39ba80 (patch) | |
| tree | 92f64e51aabe6bbdb85b09afae8aa99e8c8bf983 /drivers/usb | |
| parent | 80e91fd59bc5291c6fe322551f644a58cf2c5e98 (diff) | |
| download | linux-6594b2d7b1ef8260e6e36ddc96bd37a40e39ba80.tar.xz | |
usb: musb: davinci: Fix build breakage
This appears to have been broken by
commit 5cfb19ac604a68c030b245561f575c2d1bac1d49
(ARM: davinci: streamline sysmod access)
For now, fix by hardcoding USB_PHY_CTRL and DM355_DEEPSLEEP
Tested on DM365 with defconfig changes.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Acked-by: Sekhar Nori <nsekhar@ti.com>
CC: Felipe Balbi <balbi@ti.com>
Cc: <stable@vger.kernel.org> # v3.4.x
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/musb/davinci.c | 1 | ||||
| -rw-r--r-- | drivers/usb/musb/davinci.h | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c index 768b4b55c816..9d63ba4d10d6 100644 --- a/drivers/usb/musb/davinci.c +++ b/drivers/usb/musb/davinci.c @@ -34,6 +34,7 @@ #include <linux/dma-mapping.h> #include <mach/cputype.h> +#include <mach/hardware.h> #include <asm/mach-types.h> diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h index 046c84433cad..371baa0ee509 100644 --- a/drivers/usb/musb/davinci.h +++ b/drivers/usb/musb/davinci.h @@ -15,7 +15,7 @@ */ /* Integrated highspeed/otg PHY */ -#define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34) +#define USBPHY_CTL_PADDR 0x01c40034 #define USBPHY_DATAPOL BIT(11) /* (dm355) switch D+/D- */ #define USBPHY_PHYCLKGD BIT(8) #define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */ @@ -27,7 +27,7 @@ #define USBPHY_OTGPDWN BIT(1) #define USBPHY_PHYPDWN BIT(0) -#define DM355_DEEPSLEEP_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x48) +#define DM355_DEEPSLEEP_PADDR 0x01c40048 #define DRVVBUS_FORCE BIT(2) #define DRVVBUS_OVERRIDE BIT(1) |