diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2011-03-31 06:48:54 +0400 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2011-04-13 12:51:28 +0400 |
| commit | 132543074af3cf1e94e3608abf162880edbdcbb3 (patch) | |
| tree | 498abf639ee20de505593f776756d40fdcbe9d1c /drivers/usb/musb/musbhsdma.c | |
| parent | 4f9edd2d7e8dd170d10780532cb76eb5890468b4 (diff) | |
| download | linux-132543074af3cf1e94e3608abf162880edbdcbb3.tar.xz | |
USB: musb: blackfin: work around anomaly 05000450
DMA mode 1 data corruption anomaly on Blackfin systems. This issue is
specific to the Blackfin silicon as the bug appears to be related to the
connection of the musb ip to the bus/dma fabric.
Data corruption when using USB DMA mode 1. (Issue manager 17-01-0105)
DMA mode 1 allows large size transfers to generate a single interrupt
at the end of the entire transfer. The transfer is split up in packets
of length specified in the Maximum Packet Size field for that endpoint.
If the transfer size is not an integer multiple of the Maximum Packet
Size, a short packet will be present at the end of the transfer.
Under certain conditions this packet may be corrupted in the USB FIFO.
Workaround:
Use DMA mode 1 to transfer (n* Maximum Packet Size) and schedule DMA
mode 0 to transfer the short packet.
As an example if your transfer size is 33168 bytes and Maximum Packet
Size equals 512, schedule [33168 - (33168 mod 512)] in DMA mode 1 and
the remainder (33168 mod 512) in DMA mode 0.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/musb/musbhsdma.c')
| -rw-r--r-- | drivers/usb/musb/musbhsdma.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c index 0144a2d481fd..d281792db05c 100644 --- a/drivers/usb/musb/musbhsdma.c +++ b/drivers/usb/musb/musbhsdma.c @@ -169,6 +169,14 @@ static int dma_channel_program(struct dma_channel *channel, BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || channel->status == MUSB_DMA_STATUS_BUSY); + /* Let targets check/tweak the arguments */ + if (musb->ops->adjust_channel_params) { + int ret = musb->ops->adjust_channel_params(channel, + packet_sz, &mode, &dma_addr, &len); + if (ret) + return ret; + } + /* * The DMA engine in RTL1.8 and above cannot handle * DMA addresses that are not aligned to a 4 byte boundary. |