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authorAlan Stern <stern@rowland.harvard.edu>2018-08-28 17:57:25 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-09-10 21:05:02 +0300
commit87f88dfcde0ecde2a1136b8364099dddb9895b12 (patch)
treeef05537b0ce24d2b6185873a0f566c93aca60b40 /drivers/usb/host
parentffa8a31b5b3b81f12a9d77a574cc0b25bb8e856e (diff)
downloadlinux-87f88dfcde0ecde2a1136b8364099dddb9895b12.tar.xz
USB: OHCI: Remove USB bus reset delay from OHCI handover code
Paul pointed out that the 50-ms sleep during OHCI initialization takes up a large fraction of a system's boot time. Things get worse when there are two OHCI controllers present, each requiring 50 ms. However, there really is no need to send a 50-ms reset signal out all the root-hub ports during initialization. The ports themselves will be disabled, and the only way to enable a port is to reset it. Therefore all attached USB devices will receive a proper reset in any case. The controller reset does not need to be long enough to reset those other devices, so the 50-ms delay isn't necessary. Without the delay, there is no remaining incentive for skipping the reset when the controller is already in the RESET state. This patch removes the test, issuing the command unconditionally, and removes the following delay. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Suggested-by: Paul Menzel <pmenzel@molgen.mpg.de> Tested-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/pci-quirks.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 3625a5c1a41b..3ce71cbfbb58 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -783,15 +783,9 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
/* disable interrupts */
writel((u32) ~0, base + OHCI_INTRDISABLE);
- /* Reset the USB bus, if the controller isn't already in RESET */
- if (control & OHCI_HCFS) {
- /* Go into RESET, preserving RWC (and possibly IR) */
- writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
- readl(base + OHCI_CONTROL);
-
- /* drive bus reset for at least 50 ms (7.1.7.5) */
- msleep(50);
- }
+ /* Go into the USB_RESET state, preserving RWC (and possibly IR) */
+ writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
+ readl(base + OHCI_CONTROL);
/* software reset of the controller, preserving HcFmInterval */
if (!no_fminterval)