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authorMathias Nyman <mathias.nyman@linux.intel.com>2018-05-21 16:39:52 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-05-24 19:03:07 +0300
commitbcaa9d5c59005eceed5f2112c13240401f0fb93b (patch)
treef6152c46bddbadf791b8fda13079c431b0d21981 /drivers/usb/host/xhci.h
parentc508f41da07882602d7eda9268febbefc095695a (diff)
downloadlinux-bcaa9d5c59005eceed5f2112c13240401f0fb93b.tar.xz
xhci: Create new structures to store xhci port information
Current way of having one array telling only the port speed, and then two separate arrays with mmio addresses for usb2 and usb3 ports requeres helper functions to transate hw to hcd, and hcd to hw port numbers, and is hard to expand. Instead create a structure describing a port, including the mmio address, the port hardware index, hcd port index, and a pointer to the roothub it belongs to. Create one array containing all port structures in the same order the hardware controller sees them. Then add an array of port pointers to each xhci hub structure pointing to the ports that belonging to the roothub. This way we can easily convert hw indexed port events to usb core hcd port numbers, and vice versa usb core hub hcd port numbers to hw index and mmio address. Other benefit is that we can easily find the parent hcd and xhci structure of a port structure. This is useful in debugfs where we can give one port structure pointer as parameter and get both the correct mmio address and xhci lock needed to set some port parameter. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r--drivers/usb/host/xhci.h21
1 files changed, 16 insertions, 5 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 6dfc4867dbcf..38aa8a6777a8 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1683,13 +1683,23 @@ static inline unsigned int hcd_index(struct usb_hcd *hcd)
else
return 1;
}
+struct xhci_port {
+ __le32 __iomem *addr;
+ int hw_portnum;
+ int hcd_portnum;
+ struct xhci_hub *rhub;
+};
struct xhci_hub {
- u8 maj_rev;
- u8 min_rev;
- u32 *psi; /* array of protocol speed ID entries */
- u8 psi_count;
- u8 psi_uid_count;
+ struct xhci_port **ports;
+ unsigned int num_ports;
+ struct usb_hcd *hcd;
+ /* supported prococol extended capabiliy values */
+ u8 maj_rev;
+ u8 min_rev;
+ u32 *psi; /* array of protocol speed ID entries */
+ u8 psi_count;
+ u8 psi_uid_count;
};
/* There is one xhci_hcd structure per controller */
@@ -1838,6 +1848,7 @@ struct xhci_hcd {
struct xhci_bus_state bus_state[2];
/* Is each xHCI roothub port a USB 3.0, USB 2.0, or USB 1.1 port? */
u8 *port_array;
+ struct xhci_port *hw_ports;
/* Array of pointers to USB 3.0 PORTSC registers */
__le32 __iomem **usb3_ports;
unsigned int num_usb3_ports;