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authorMathias Nyman <mathias.nyman@linux.intel.com>2015-10-01 18:40:34 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-10-04 12:34:17 +0300
commit47189098f8bebe4d937945df70d3ca8e6c0b3e4d (patch)
treed2e3d2ae95da94fcbc65fd7beb758ca0e2dffdb3 /drivers/usb/host/xhci-mem.c
parent3220befddc0da1f4e09fc790a32a9bd8427e8889 (diff)
downloadlinux-47189098f8bebe4d937945df70d3ca8e6c0b3e4d.tar.xz
xhci: parse xhci protocol speed ID list for usb 3.1 usage
xhci 1.1 controllers that support USB 3.1 must provide a protocol speed ID (PSI) list to inform the driver of the supported speeds. The PSI list can be read from the xhci supported protocol extended capabilities. The PSI values will be used to create a USB 3.1 SuperSpeedPlus capability descriptor for the xhci USB 3.1 roothub. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci-mem.c')
-rw-r--r--drivers/usb/host/xhci-mem.c38
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 41f841fa6c4d..bc540903542a 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -2072,14 +2072,23 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
{
u32 temp, port_offset, port_count;
int i;
+ struct xhci_hub *rhub;
- if (major_revision > 0x03) {
+ temp = readl(addr);
+
+ if (XHCI_EXT_PORT_MAJOR(temp) == 0x03) {
+ rhub = &xhci->usb3_rhub;
+ } else if (XHCI_EXT_PORT_MAJOR(temp) <= 0x02) {
+ rhub = &xhci->usb2_rhub;
+ } else {
xhci_warn(xhci, "Ignoring unknown port speed, "
"Ext Cap %p, revision = 0x%x\n",
addr, major_revision);
/* Ignoring port protocol we can't understand. FIXME */
return;
}
+ rhub->maj_rev = XHCI_EXT_PORT_MAJOR(temp);
+ rhub->min_rev = XHCI_EXT_PORT_MINOR(temp);
/* Port offset and count in the third dword, see section 7.2 */
temp = readl(addr + 2);
@@ -2094,6 +2103,33 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
/* WTF? "Valid values are ‘1’ to MaxPorts" */
return;
+ rhub->psi_count = XHCI_EXT_PORT_PSIC(temp);
+ if (rhub->psi_count) {
+ rhub->psi = kcalloc(rhub->psi_count, sizeof(*rhub->psi),
+ GFP_KERNEL);
+ if (!rhub->psi)
+ rhub->psi_count = 0;
+
+ rhub->psi_uid_count++;
+ for (i = 0; i < rhub->psi_count; i++) {
+ rhub->psi[i] = readl(addr + 4 + i);
+
+ /* count unique ID values, two consecutive entries can
+ * have the same ID if link is assymetric
+ */
+ if (i && (XHCI_EXT_PORT_PSIV(rhub->psi[i]) !=
+ XHCI_EXT_PORT_PSIV(rhub->psi[i - 1])))
+ rhub->psi_uid_count++;
+
+ xhci_dbg(xhci, "PSIV:%d PSIE:%d PLT:%d PFD:%d LP:%d PSIM:%d\n",
+ XHCI_EXT_PORT_PSIV(rhub->psi[i]),
+ XHCI_EXT_PORT_PSIE(rhub->psi[i]),
+ XHCI_EXT_PORT_PLT(rhub->psi[i]),
+ XHCI_EXT_PORT_PFD(rhub->psi[i]),
+ XHCI_EXT_PORT_LP(rhub->psi[i]),
+ XHCI_EXT_PORT_PSIM(rhub->psi[i]));
+ }
+ }
/* cache usb2 port capabilities */
if (major_revision < 0x03 && xhci->num_ext_caps < max_caps)
xhci->ext_caps[xhci->num_ext_caps++] = temp;