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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 22:05:45 +0300 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 22:05:45 +0300 |
commit | d04cdb64212eb5ae6a98026a97dda626e40e8e9a (patch) | |
tree | b6a7dbb21ccfceb915844e9a330b3d3dfcaf3c5b /drivers/usb/host/ohci-pci.c | |
parent | 2f8600dff2b140096a7df781884e918a16aa90e0 (diff) | |
parent | ec1248e70edc5cf7b485efcc7b41e44e10f422e5 (diff) | |
download | linux-d04cdb64212eb5ae6a98026a97dda626e40e8e9a.tar.xz |
Merge ../linux-2.6
Diffstat (limited to 'drivers/usb/host/ohci-pci.c')
-rw-r--r-- | drivers/usb/host/ohci-pci.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index 1b09dde068e1..1bfe96f4d045 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c @@ -35,7 +35,10 @@ ohci_pci_start (struct usb_hcd *hcd) struct ohci_hcd *ohci = hcd_to_ohci (hcd); int ret; - if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) { + /* REVISIT this whole block should move to reset(), which handles + * all the other one-time init. + */ + if (hcd->self.controller) { struct pci_dev *pdev = to_pci_dev(hcd->self.controller); /* AMD 756, for most chips (early revs), corrupts register @@ -45,7 +48,8 @@ ohci_pci_start (struct usb_hcd *hcd) && pdev->device == 0x740c) { ohci->flags = OHCI_QUIRK_AMD756; ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); - // also somewhat erratum 10 (suspend/resume issues) + /* also erratum 10 (suspend/resume issues) */ + device_init_wakeup(&hcd->self.root_hub->dev, 0); } /* FIXME for some of the early AMD 760 southbridges, OHCI @@ -88,6 +92,13 @@ ohci_pci_start (struct usb_hcd *hcd) ohci_dbg (ohci, "enabled Compaq ZFMicro chipset quirk\n"); } + + /* RWC may not be set for add-in PCI cards, since boot + * firmware probably ignored them. This transfers PCI + * PM wakeup capabilities (once the PCI layer is fixed). + */ + if (device_may_wakeup(&pdev->dev)) + ohci->hc_control |= OHCI_CTRL_RWC; } /* NOTE: there may have already been a first reset, to |