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authorRobert Baldyga <r.baldyga@samsung.com>2016-08-29 23:38:52 +0300
committerFelipe Balbi <felipe.balbi@linux.intel.com>2016-08-31 10:06:05 +0300
commitaa381a7259c3f53727bcaa8c5f9359e940a0e3fd (patch)
tree9c5853906977ae684ef24c1f5963623d5ff9792b /drivers/usb/dwc2/core.h
parentad674a15249e7d800162858e49272877a782ec40 (diff)
downloadlinux-aa381a7259c3f53727bcaa8c5f9359e940a0e3fd.tar.xz
usb: dwc2: gadget: fix TX FIFO size and address initialization
According to DWC2 documentation, DPTxFSize field of DPTXFSIZn register is read only, which means that software cannot change FIFO size. Register description says: "The value of this register is the Largest Device Mode Periodic Tx Data FIFO Depth (parameter OTG_TX_DPERIO_DFIFO_DEPTH_n), as specified during coreConsultant configuration." That means, that we have to setup only FIFO start addresses (DPTxFStAddr), taking into account reset values of DPTxFSize. Initialize FIFO start addresses properly and remove unneeded core related to incorrect FIFO size initialization. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/core.h')
-rw-r--r--drivers/usb/dwc2/core.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 9fae0291cd69..78526eedf519 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -259,13 +259,6 @@ enum dwc2_lx_state {
DWC2_L3, /* Off state */
};
-/*
- * Gadget periodic tx fifo sizes as used by legacy driver
- * EP0 is not included
- */
-#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \
- 768, 0, 0, 0, 0, 0, 0, 0}
-
/* Gadget ep0 states */
enum dwc2_ep0_state {
DWC2_EP0_SETUP,