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authorMichael Grzeschik <m.grzeschik@pengutronix.de>2013-06-13 18:59:56 +0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-18 00:47:09 +0400
commit40dcd0e8067b35e247f74409d79443634daf35ac (patch)
tree91b9e6678ad1b2bd72e45d3e35a9266aaefa016f /drivers/usb/chipidea/bits.h
parent1c9af65357a309b60d78a442bd61d27cad458d00 (diff)
downloadlinux-40dcd0e8067b35e247f74409d79443634daf35ac.tar.xz
usb: chipidea: add PTW, PTS and STS handling
This patch makes it possible to configure the PTW, PTS and STS bits inside the portsc register for host and device mode before the driver starts and the phy can be addressed as hardware implementation is designed. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/chipidea/bits.h')
-rw-r--r--drivers/usb/chipidea/bits.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
index 050de8562a04..aefa0261220c 100644
--- a/drivers/usb/chipidea/bits.h
+++ b/drivers/usb/chipidea/bits.h
@@ -48,10 +48,24 @@
#define PORTSC_SUSP BIT(7)
#define PORTSC_HSP BIT(9)
#define PORTSC_PTC (0x0FUL << 16)
+/* PTS and PTW for non lpm version only */
+#define PORTSC_PTS(d) \
+ ((((d) & 0x3) << 30) | (((d) & 0x4) ? BIT(25) : 0))
+#define PORTSC_PTW BIT(28)
+#define PORTSC_STS BIT(29)
/* DEVLC */
#define DEVLC_PSPD (0x03UL << 25)
-#define DEVLC_PSPD_HS (0x02UL << 25)
+#define DEVLC_PSPD_HS (0x02UL << 25)
+#define DEVLC_PTW BIT(27)
+#define DEVLC_STS BIT(28)
+#define DEVLC_PTS(d) (((d) & 0x7) << 29)
+
+/* Encoding for DEVLC_PTS and PORTSC_PTS */
+#define PTS_UTMI 0
+#define PTS_ULPI 2
+#define PTS_SERIAL 3
+#define PTS_HSIC 4
/* OTGSC */
#define OTGSC_IDPU BIT(5)